Qualcomm and Google team up on RISC-V for wearables

Qualcomm Technologies and Google have announced a co-operation initiative around a solution for wearable devices based on the RISC-V processor and Google’s Wear OS  system. The aim is to create opportunities for more products to exploit the advantages of customised low-power, high-performance CPUs. The companies say they will continue to invest in Snapdragon Wear platforms as the main chip supplier for smartwatches in the Wear OS ecosystem.

“Qualcomm Technologies has been a pillar of the Wear OS ecosystem, providing high-performance, low-power systems to many of our OEM partners. We’re excited to be able to extend our work with Qualcomm Technologies and bring a RISC-V based wearable solution to market,” says Bjorn Kilburn, general manager of Google Wear OS.

Last May, Qualcomm Technologies and Google joined other industry players to launch the RISC-V Software Ecosystem (RISE), a collaborative effort to accelerate the availability of software aimed at high-performance, energy-efficient RISC-V cores. RISE members will contribute financially as well as engineering talent to address software products prioritised by the RISE technical committee.

Furthermore, in August, Qualcomm Technologies announced that it is investing in a new company, based in Germany, to promote the adoption of RISC-V worldwide. The initial focus will be automotive, but with an eventual expansion to include mobile devices and the Internet of Things (IoT).

RISC-V enters the scene

When we think of processors, we usually think of brands such as Intel, AMD and Nvidia, among others, and also their respective instruction set architectures (ISA) used by the chips at machine level; the most common ISAs are CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer).

Historically, the x86 (CISC) architecture dominated the market for a long time, especially in the world of personal computers, until the arrival of the ARM (Advanced RISC Machines) architecture, with a focus on energy efficiency for mobile devices.

More recently, a new name has come onto the scene, RISC-V (pronounced RISC “five”). This is another type of ISA that originated at the Parallel Computing Laboratory (Par Lab) at the University of California, Berkeley in 2010. Its main feature is that it is open source, unlike the other two widespread proprietary architectures (x86 and ARM), which have licensing fees and customisation limitations.

Due to the open nature of RISC-V, architects, designers and developers can modify and improve its simple instruction base. As the nomenclature suggests, RISC-V is of the RISC class, i.e. it has a small set of instructions, making it much easier to adapt to customise processors.

In technological terms, RISC-V is clearly an open source alternative to the ARM architecture. Over the years, ARM has enabled industry giants such as Apple, AMD and Qualcomm itself to design and manufacture CPUs and GPUs optimized for different applications, from energy-efficient mobile devices to high-performance servers.

RISC-V has now emerged to offer more control, visibility and flexibility for customisation and innovation in the processor domain, and also as an interesting way to reduce costs and ensure competitiveness for OEMs and chip suppliers.

According to Ziad Asghar, senior vice president of product management at Qualcomm Technologies, RISC-V has been integrated into the company’s products since 2019 as an alternative to more rigid legacy architectures. For example, the Snapdragon 865 platform uses RISC-V microcontrollers, because Qualcomm was looking for something very specific for chip control purposes, and RISC-V made it possible to design exactly what was needed.

“RISC-V clearly has incredible potential. For product developers, it eliminates the problem of being tied to the limited portfolio of cores available on a proprietary ISA. And it eliminates the need to invest in license fees for the development of new processors. RISC-V opens up the possibility for any company in the world to develop processors without paying license fees or royalties,” says Asghar.

He adds that the fascinating part is being able to customize RISC-V to precisely meet the objectives of new products. “This kind of openness, flexibility, and expandability is extremely attractive to us and to other companies as well,” Asghar emphasises.

Judicial, economic and governmental issues

Licence payments have been the subject of a legal dispute between Qualcomm and Arm (the company that licenses the ARM architecture), despite their long-standing partnership. Arm has filed a lawsuit against Qualcomm and Nuvia (a CPU start-up acquired by Qualcomm in 2021), alleging breach of Nuvia’s licence and trademark agreements.

In addition to the legal issue, some say that Qualcomm and other companies are looking to RISC-V as a way to isolate themselves from Arm, which is at the centre of most mobile devices, but may be in dire straits because it doesn’t make much money from licensing deals. Another reason for the interest in RISC-V is the trade war between the United States and China. To escape the political influence of the US government, the RISC-V Foundation even moved to Switzerland in 2019 and was renamed “RISC-V International”. However, the issue promises to heat up and have new chapters, since at the beginning of October, US lawmakers pressured US President Joe Biden to impose restrictions on US companies working with RISC-V regularly used in China.